An Autonomous Low Power High Resolution micro-Digital Sun Sensor

Micro-Digital Sun Sensor (μDSS) is a sun detector which senses the respective angle between a satellite and the sun. It is composed of a solar cell power supply, a RF communication block and a CMOS Image Sensor (CIS) chip, which is called APS+. The paper describes the implementation of a prototype of the μDSS APS+ processed in a standard 0.18μm CMOS process. The μDSS is applied for micro or nano satellites. Power consumption is a very rigid specification in this kind of application, thus the APS+ is optimized for low power consumption. This character is realized by a specific pixel design which implements profiling and windowing during the detection process. The profiling is completely fast and power efficiently by a “Winner Take ALL (WTA)” principle. The measurement results shows that the APS+ achieves a reduction of power consumption by more than a factor 10 compared to stateof-the-art. Besides the low power consumption, the APS+ also proposes a quadruple sampling method which improves thermal noise with 3-T Active Pixel image Sensor (APS) structure. Keyword list: CIS, WTA, low power, quadruple sampling, APS Section I Overview of the μDSS Figure 1 System sketch of the μDSS The system sketch of the μDSS [1] is presented in Figure 1. It is a pinhole camera in principle: a CMOS image sensor as the photosensitive component, and a pinhole as aperture. In this application, the sun is considered as a point light source. A membrane which completely shields the sun light locates above the image sensor’s focal plane. A pinhole is at the center of this membrane. The sun light projects an image on the image sensor’s pixel array through the pinhole. By reading out the centroid of the sun light projected image, the sunlight incident angle (θ) can be calculated. The satellite’s attitude angle α and β can also be further determined according to the centroid information. Figure 2 Sun ray tracking route in the μDSS The optical structure of the μDSS is illustrated in Figure 2. A sapphire layer is located on top of the membrane, with a filter at its back side. Without a filter, the pixels will be constantly saturated by the sun light reaching the μDSS surface, since the light intensity has a typical value of 1500 2 W/m . The filter will limit the sun light to a reasonable level that the pixels illuminated by the sun light are close to saturation level. This filter has to be designed according to the quantum efficiency of the pixel. The measurement result of the quantum efficiency is presented in Figure 3. Figure 3 Measurement results of quantum efficiency As shown in Figure 2, an indium tin oxide (ITO) layer is deposited on top of the sapphire window. The ITO layer is a transparent conducting oxide layer, which is connected to the grounded housing. With the ITO layer the charge generated due to cosmic radiation will be discharged through the housing. An aluminum layer is deposited on the top of the membrane; while it is black coated on the bottom side. In this way, the influence from the reflected light will be minimized. The incident angle θ can be achieved by the relation below: l = tanθ×F ⇒ θ = arctan( F l ) (E1) Here, l is the distance between the center of the pixel array and the centroid of the sun spot, F is the focal length. This relation also shows that the centroiding accuracy is highly decided by the accurate knowledge of the sun spot location on the pixel array. Section II Component Structure of the μDSS Figure 4(a) Cross section of the μDSS system; (b) Block diagram Figure 4 illustrates the cross section and block diagram of the μDSS system. As indicated in the block diagram, the μDSS is composed of an image sensor chip named APS+, a solar cell, and an RF module. The critical component in the μDSS is APS+. It is composed of an APS image sensor, an A-to-D converter (ADC) and digital processing circuit. The functions of these blocks are listed below: 1) APS: The APS is the photosensitive element in the system. It converts the incoming light signal into voltage signal. The APS is composed of the pixel array, sample-hold array and readout circuit. The output signal is read out in analog domain. 2) Chip level ADC: A 12-bit pipeline ADC is implemented. It reads out the analog signal from the APS and outputs the digital signals to the centroid algorithm circuit. 3) Digital processing circuit: The Digital processing circuit includes the centroid algorithm circuit, the I/O interface circuit and Timing and Control circuit. The centroid algorithm determines the sun light projected image’s centroid coordinate on the focal plane based on the APS’s outputs. Through the I/O interface, the μDSS receives commands from the outside and outputs the centroid coordinate. The Timing & Control circuit generates the timing and control signals for the APS. Besides the APS+, the solar cell is the power supplier of the system, and the RF block works for communication between the μDSS system and other elements on the satellite. Section III Low Power Approach Due to the small size, the solar cell which can be carried by a microsatellite is relatively small. So the rigid power consumption budget is one of the critical technical challenges for the μDSS. As indicated in Figure 1, in the μDSS system, the size of the sun spot is approximately 10×10 pixels, while the size of the image sensor pixel array is 368×368 pixels. The conventional readout method determines the sun spot centroid based on the readout result of the complete pixel array [2]. Under a certain frame rate the high working frequency of ADC and readout circuit results in very high power consumption. In addition, the size of the sun spot is extremely small compared to the whole pixel array. The conventional method wastes most of time and power on reading out the pixels that don’t have any useful information. Due to the above reasons, the power consumption of a conventional digital sun sensor can be the order of several watts [2]. The discussion above shows that power consumption reduction can be achieved by lowering down the working frequency for ADC and readout circuit as well as detecting the Region of Interest (ROI) on the pixel array. Both of the targets are realized by APS+. The APS+ adopts a power saving two step acquisition tracking readout method. Once powered on, the APS+ works in sun acquisition mode in order to detect the coarse location of the sun spot. At the end of the acquisition, the APS+ determines the ROI by evaluating the intensity profiles in column and row directions. In the next step, the APS+ starts working in sun tracking mode: All pixels in the ROI are readout and the final centroid is extracted by the digital algorithm. Figure 5 Pixel structure which implements WTA principle Figure 5 illustrates the pixel structure which implements the WTA principle in the sun acquisition mode [3]. The pixel is structured based on 3-T APS, but with all p-MOS transistors. Assuming the first photodiode is the most heavily illustrated on a specific column, at the end of integration, V1 will be the lowest among all photodiode output voltages (V1, V2...Vn). Right after the integration, all pixels on the same column are shorted on the column bus, the column bus voltage Vc will reduce due to the current floating through the source followers (SF1, SF2... SFn). Vc will keep decreasing until it reaches the value that only SF1 is still in the saturation region, and all other source followers are turned off. In other words, the column bus voltage is decided by the output voltage of the most illuminated pixel or the so called “winner”. The column profiling is achieved by shortening all row select transistors (RS<1>, RS<2>... RS) during “column profiling” period. The column voltage is exclusively decided by the “winner” pixel only when the voltage difference between the “winner” and other competitors is larger than a minimum value. This minimum value can be defined as the resolution of the WTA principle. In an ideal case, assume that in the column of Figure 5, the first photodiode is so strongly illuminated that only SF1 is turned on and completely occupies the column current source ID. The value of ID is selected in the way that SF1 is in the saturation region. The value of VC can be derived: